Silicon Intellectual Property (SIP, Silicon IP) is a business model for a semiconductor company where the company licenses its technology to a customer as intellectual property. This is a type of fabless semiconductor company which doesn't provide physical chips to its customers but merely facilitates the customer's development of chips by offering certain functional blocks. Typically, the customers are semiconductor companies or module developers with in-house semiconductor development. A company wishing to fabricate a complex device may purchase the rights to use anther company's well-tested functional blocks such as a microprocessor, instead of developing their own design which would take additional time and cost.
The Silicon IP industry is fairly new but with stable growth. The most successful Silicon IP companies, often referred to as the Star IP, include ARC International. ARM Holdings, Rambus, and MIPS Technologies. Gartner Group estimated the total value of sales related to silicon intellectual property at US $1.5 billion in 2005, with annual growth expected around 30%.[1]
IP hardening is a process to re-use proven design, and generate fast time-to-market, low-risk-in-fabrication solutions to provide Intellectual property (IP) (or Silicon intellectual property) of design cores.
For example, a DSP processor is developed from soft cores of RTL (Register transfer level) format, and it can be targeted to various technologies or different foundries to yield different implementations. The process of IP hardening is from soft core to generate re-usable hard (hardware) cores. A main advantage of such hard IP is its predictable characteristics as the IP has been pre-implemented, while it offers flexibility of soft cores. It might come with a set of models for simulations or verifications.
The effort input to harden the soft IP means quality of the target technology, goals of design and the methodology employed. The hard IP has been proven in the target technology and application. E.g. the hard core in GDS II format is said to clean in DRC (Design rule checking), and LVS (see Layout Versus Schematic). I.e. that can pass all the rules required for manufacturing by the specific foundry.[2][3]